Co - emulation mode and vector mode are implemented using the c + + , verilog hdl and vhdl . an experiment has been done to prove that the system can work correctly 并綜合運(yùn)用c + + / veriloghdl / vhdl語言設(shè)計(jì)實(shí)現(xiàn)了該系統(tǒng)的聯(lián)合驗(yàn)證模式和測試向量模式的仿真程序。
The results of co - simulation mode , vector mode and transactor mode test made on the platform indicated that its performance has achieved the advanced level compared with other global relevant products 軟件的設(shè)計(jì)和硬件系統(tǒng)架構(gòu)的設(shè)計(jì)都已經(jīng)完成,并在此基礎(chǔ)上進(jìn)行了聯(lián)合仿真模式、數(shù)據(jù)流模式以及事務(wù)級模式的軟硬件聯(lián)合驗(yàn)證實(shí)驗(yàn)。
In the vector mode , all part of the design is implemented in the reconfigurable system ; stimulus and response vector is transferred serially to and from hardware . this mode improves the verification 測試向量模式是將整個(gè)被驗(yàn)證設(shè)計(jì)全部都下載到硬件平臺(tái)上,測試向量以數(shù)據(jù)流的形式在軟件環(huán)境和硬件平臺(tái)之間傳遞,對被驗(yàn)證設(shè)計(jì)施加測試向量和接收響應(yīng)。